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EXTRACT

General Form

dest_reg = EXTRACT ( scene_reg, pattern_reg ) (Z)
dest_reg = EXTRACT ( scene_reg, pattern_reg ) (X)

Syntax

Dreg = EXTRACT ( Dreg, Dreg_lo ) (Z) ; /* zero-extended (b)*/
Dreg = EXTRACT ( Dreg, Dreg_lo ) (X) ; /* sign-extended (b)*/

Syntax Terminology

Dreg
R7–0
Dreg_lo
R7–0.L

Instruction Length

In the syntax, comment (b) identifies 32-bit instruction length.

Functional Description

The Bit Field Extraction instruction moves only specific bits from the scene_reg into the low-order bits of the dest_reg. The user determines the length of the pattern bit field and its position in the scene field. The input register bit field definitions appear in Table 13-2.

Table 13-2.Input Register Bit Field Definitions

reg 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
scene_reg s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s
pattern_reg x x x p p p p p x x x L L L L L
  • s = scene bit field (32 bits)
  • p = position of pattern bit field LSB in scene_reg (valid range 0 through 31)
  • L = length of pattern bit field (valid range 0 through 31)

The operation reads the pattern bit field of length L from the scene bit field, with the pattern LSB located at bit p of the scene. See “Example”, below, for more.

Boundary Case

If (p + L) > 32: In the zero-extended and sign-extended versions of the instruction, the architecture assumes that all bits to the left of the scene_reg are zero. In such a case, the user is trying to access more bits than the register actually contains. Consequently, the architecture fills any undefined bits beyond the MSB of the scene_reg with zeros.

The Bit Field Extraction instruction does not modify the contents of the two source registers. One of the source registers can also serve as dest_reg.

Options

The user has the choice of using the (X) syntax to perform sign-extend extraction or the (Z) syntax to perform zero-extend extraction.

Flags Affected

This instruction affects flags as follows.

  • AZ is set if result is zero; cleared if nonzero.
  • AN is set if result is negative; cleared if non-negative.
  • AC0 is cleared.
  • V is cleared.
  • All other flags are unaffected.

<note> The ADSP-BF535 processor has fewer ASTAT flags and some flags operate differently than subsequent Blackfin family products. For more information on the ADSP-BF535 status flags, see Table A-1 on page A-3.

Required Mode

User & Supervisor

Parallel Issue

This instruction can be issued in parallel with specific other 16-bit instructions. For details, see “Issuing Parallel Instructions” on page 20-1.

Example

Bit Field Extraction Unsigned

r7 = extract (r4, r3.l) (z) ; /* zero-extended*/

Example 1

  • R4=0b1010 0101 1010 0101 1100 0011 1010 1010 where this is the scene bit field
  • R3=0bxxxx xxxx xxxx xxxx 0000 0111 0000 0100 where bits 15–8 are the position, and bits 7–0 are the length then the Bit Field Extraction

(unsigned) instruction produces:

  • R7=0b0000 0000 0000 0000 0000 0000 0000 0111

Example 2

  • R4=0b1010 0101 1010 0101 1100 0011 1010 1010 where this is the scene bit field
  • R3=0bxxxx xxxx xxxx xxxx 0000 1101 0000 1001 where bits bits 15–8 are the position, and bits 7–0 are the length

then the Bit Field Extraction (unsigned) instruction produces:

  • R7=0b0000 0000 0000 0000 0000 0001 0010 1110 Bit Field Extraction Sign-Extended

FIXME

r7 = extract (r4, r3.l) (x) ; /* sign-extended*/

Example 1

  • R4=0b1010 0101 1010 0101 1100 0011 1010 1010 where this is the scene bit field
  • R3=0bxxxx xxxx xxxx xxxx 0000 0111 0000 0100 where bits 15–8 are the position, and bits 7–0 are the length

then the Bit Field Extraction (sign-extended) instruction produces:

  • R7=0b0000 0000 0000 0000 0000 0000 0000 0111

Example 2

  • R4=0b1010 0101 1010 0101 1100 0011 1010 1010 where this is the scene bit field
  • R3=0bxxxx xxxx xxxx xxxx 0000 1101 0000 1001 where bits bits 15–8 are the position, and bits 7–0 are the length

Then the Bit Field Extraction (sign-extended) instruction produces:

  • R7=0b1111 1111 1111 1111 1111 1111 0010 1110

Also See

Special Applications

Video image pattern recognition and separation algorithms