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EXTERNAL EVENT MANAGEMENT

This chapter discusses the instructions that manage external events. Users can take advantage of these instructions to enable interrupts, force a specific interrupt or reset to occur, or put the processor in idle state. The Core Synchronize instruction resolves all pending operations and flushes the core store buffer before proceeding to the next instruction. The System Synchronize instruction forces all speculative, transient states in the core and system to complete before processing continues. Other instructions in this chapter force an emulation exception, placing the processor in Emulation mode; test the value of a specific, indirectly-addressed byte; or increment the Program Counter (PC) without performing useful work.

Instruction Summary

  • CSYNC (Core Synchronize)
  • SSYNC (System Synchronize)
  • EMUEXCPT (Force Emulation)
  • CLI (Disable Interrupts)
  • STI (Enable Interrupts)
  • RAISE (Force Interrupt / Reset)
  • EXCPT (Force Exception)
  • TESTSET (Test and Set Byte (Atomic)
  • NOP (16-bit No Op)
  • MNOP (32-bit No Op)