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General Form

BITTGL ( register, bit_position )


BITTGL ( Dreg , uimm5 ) ; /* (a) */ 

Syntax Terminology

5-bit unsigned field, with a range of 0 through 31

Instruction Length

In the syntax, comment (a) identifies 16-bit instruction length.

Functional Description

The Bit Toggle instruction inverts the bit designated by bit_position in the specified D-register. The instruction does not affect other bits in theD-register. The bit_position range of values is 0 through 31, where 0 indicates the LSB, and 31 indicates the MSB of the 32-bit D-register.

Flags Affected

The Bit Toggle instruction affects flags as follows.

  • AZ is set if result is zero; cleared if nonzero.
  • AN is set if result is negative; cleared if non-negative.
  • AC0 is cleared.
  • V is cleared.
  • All other flags are unaffected.

The ADSP-BF535 processor has fewer ASTAT flags and some flags operate differently than subsequent Blackfin family products. For more information on the ADSP-BF535 status flags, see Table A-1 on page A-3.

Required Mode

User & Supervisor

Parallel Issue

This instruction cannot be issued in parallel with other instructions.


 bittgl (r2, 24) ; /* toggle bit 24 (the 25th bit from LSB in R2 */

For example, if R2 contains 0xF1FFFFFF before this instruction, it contains 0xF0FFFFFF after the instruction. Executing the instruction a second time causes the register to contain 0xF1FFFFFF.

Also See

Special Applications