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BF533 STAMP Board

adi-shot-bf533-stamp.jpg

This is a low-cost development platform for the ADSP-BF533 Blackfin device. The STAMP board is part of the Blackfin/uClinux open source project. The schematics for the board as well as other related documents are available here. The STAMP board is commercially available and can be purchased from Digikey.

An overview of some of the STAMP board's features are given below:

  • ADSP-BF533 Blackfin device with JTAG interface
  • 500MHz core clock
  • 133MHz system clock (SCLK) 1)
  • 64M x 16bit external SDRAM (128MBytes)
  • 2M x 16bit external flash (4MBytes)
  • 10/100 Mbps Ethernet Interface
  • UART interface with DB9 serial connector
  • 270-pin expansion interface
  • CPLD with JTAG interface allowing for custom configuration of the Ethernet interface, external memory, and programmable flags
  • connectors to various Blackfin peripherals: PPI, SPI, SPORT0, SPORT1, IrDA, I2C, and Timers

STAMP boards contain ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused Stamp boards in the protective shipping packages.

Setting up the STAMP Hardware

To connect the STAMP board:

  1. Remove the STAMP board from the package. Be careful when handling the board to avoid the discharge of static electricity, which may damage some components.
  2. The figure below shows the default Switch (S1 switches should both be down, as facing the picture), connector locations, and LEDs. Confirm that your board is set up in the default configuration before continuing.
  3. Plug the provided power supply into J13 on the STAMP board. Visually verify that the green power LED (D13) is on.
  4. Connect one end of the serial cable to an available serial port on your PC and the other end to P1 on the STAMP board.
  5. Connect one end of a Ethernet cable to J12 of the STAMP board, and the other end to either a PC (requires cross over cable) or a Ethernet Hub (requires straight through cable).

Hardware Initialization

Initialization of the hardware is taken care of by both the Boot loader, and by the uClinux kernel. This initializes both the SDRAM, FLASH, Ethernet and onboard peripherals. If you are not using the provided Boot loader, or the uClinux kernel, you should review the appropriate datasheet, which can be downloaded from the STAMP project.

Networking

Networking capabilities are provided on the STAMP board via an SMSC-LAN91C111 Ethernet controller. This controller is connected to the Blackfin processor through the address and data buses of the external memory interface. Also, the Interrupt Request (IRQ) from the LAN controller is routed through the Complex Programmable Logic Device (CPLD) on the STAMP board. This enables the IRQ from the LAN to be connected to any programmable flag on the Blackfin device (PF0-PF8), by default it is connected to PF7.

Using LEDs and Push Buttons

The STAMP provides three push buttons and three LEDs for general-purpose IO which can be driven or read through the GPIO pins of the ADSP-BF533. These also run through the CPLD, enabling these pins to be disconnected from the switches or LEDs.

External Bus Interface Unit

The External Bus Interface Unit (EBIU) connects an external memory to the ADSP-BF533 device. It includes 16-bit wide data bus, address bus, and a control bus. Both 16-bit and 8-bit access is supported. On the STAMP, the EBI unit is connected to SDRAM and Flash memory.

128 Mbytes (64M x 16 bits) of SDRAM is connected to the synchronous memory bus. Note that SDRAM clock is the processor's Clock Out (CLK OUT), which frequency shall not exceed 133 Mhz.

4 Mbytes (2M x 16 bits) of Flash memory is also connected to the asynchronous memory select signals, ~AMS3 through ~AMS0. The processor can use this memory for both booting and storing information during normal operation.

The 10/100 MAC/Phy Ethernet is also connected directly to the asynchronous memory signals ~AMS3.

All of the address, data, and control signals are available externally via the extender connectors (P3-1). The pin-out of these connectors can be found in “Schematics” on the web site.

Reset Push Button

The RESET push button resets all of the ICs on the board, including peripherals on daughter cards.

Connectors

This section describes the connector functionality and provides information about mating connectors. The locations of the connectors are shown.

  • Ethernet Connector: J12,RJ45.
  • RS-232 Connector: P1,DB9,Female.
  • Power Connector: J13, 2.5mm power jack, Voltage input is 7.0 - 16V.
  • BF533 JTAG Connector :J4, BF533 JTAG connector.
  • SPORT0 Connectors: J15.
  • SPORT1 Connectors: J16.
  • PPI Connectors: J23.
  • SPI Connectors: J17.
  • TWI Connectors: J20, also known as I2C connectors.
  • TIMERS Connectors: J21.
  • IrDA Connectors: J19. This connectors is multiplexed with P1.

On-Board CPLD

There is a CPLD on the BF533-STAMP board which handles the ethernet/pin routing. More information on it (like how to program it) can be found on the BF533-STAMP CPLD page.

MAC Address

The SMSC91C111 has a unique MAC address programed into it with the standalone smc91111_eeprom program. It is described in the source code with a README.

file: u-boot-2008.10/examples/README.smc91111_eeprom

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1) 1.0 and 1.2 board revs can run higher, but 1.1 board revs should stay at ~80MHz due to SDRAM trace issues in the PCB