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User Mode

The processor is in User mode when it is not in Reset or Idle state, and when it is not servicing an interrupt, NMI, exception, or emulation event. User mode is used to process application level code that does not require explicit access to system registers. Any attempt to access restricted system registers causes an exception event. The following table lists the registers that may be accessed in User mode:

Processor Registers Register Names
Data Registers R[7:0], A[1:0]
Pointer Registers P[5:0], SP, FP, I[3:0], M[3:0], L[3:0], B[3:0]
Sequencer and Status Registers RETS, LC[1:0], LT[1:0], LB[1:0], ASTAT, CYCLES, CYCLES2

Protected Resources and Instructions

System resources consist of a subset of processor registers, all MMRs, and a subset of protected instructions. These system and core MMRs are located starting at address 0xFFC0 0000. This region of memory is protected from User mode access. Any attempt to access MMR space in User mode causes an exception.

A list of protected instructions appears in the below table. Any attempt to issue any of the protected instructions from User mode causes an exception event.

Instruction Description
RTI Return from Interrupt
RTX Return from Exception
RTN Return from NMI
CLI Disable Interrupts
STI Enable Interrupts
RAISE Force Interrupt/Reset
RTE Return from Emulation Causes an exception only if executed outside Emulation mode

Protected Memory

Additional memory locations can be protected from User mode access. A Cacheability Protection Lookaside Buffer (CPLB) entry can be created and enabled. See “Memory Management Unit” on page 6-45 for further information.

Entering User Mode

When coming out of reset, the processor is in Supervisor mode because it is servicing a reset event. To enter User mode from the Reset state, two steps must be performed. First, a return address must be loaded into the RETI register. Second, an RTI must be issued. The following example code shows how to enter User mode upon reset.

P1.L = START ;   /* Point to start of user code */
P1.H = START ;
RETI = P1 ;
RTI ;            /* Return from Reset Event */
START :          /* Place user code here */

Return Instructions That Invoke User Mode

The table below provides a summary of return instructions that can be used to invoke User mode from various processor event service routines. When these instructions are used in service routines, the value of the return address must be first stored in the appropriate event RETx register. In the case of an interrupt routine, if the service routine is interruptible, the return address is stored on the stack. For this case, the address can be found by popping the value from the stack into RETI. Once RETI has been loaded, the RTI instruction can be issued.

Current Process Activity Return Instruction to Use Execution Resumes at Address in This Register
Interrupt Service Routine RTI RETI
Exception Service Routine RTX RETX
Nonmaskable Interrupt Service Routine RTN RETN
Emulation Service Routine RTE RETE

The stack pop is optional. If the RETI register is not pushed/popped, then the interrupt service routine becomes non-interruptible, because the return address is not saved on the stack.

The processor remains in User mode until one of these events occurs: