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FPGA EZ-Kit for the BF537 Stamp

This is a project in an early stage. Full verification of the usage of the FPGA daughter card has not yet been verified. Currently, when the FPGA daughter card is plugged into the BF537-STAMP, ethernet connectivity fails


The FPGA EZ-Kit is a daughter card originally designed for the Blackfin EZ-Kit daughter cards and VisualDSP, but a project is underway to enable it usage on the Blackfin stamp boards, specifically the BF537-STAMP. Once this project is successful, it will allow quick prototyping of hardware designs interacting with a blackfin processor. The daughter card contains a Xilinx Spartan 3 FPGA(XC3S1000 FG456), 2MB SRAM, 25 MHz oscillator, 2 push-buttons, 8 LED's, and a small breadboard area. The FPGA daughter card connects through the U-connector(not included) on the bottom of the STAMP boards.

FPGA EZ-Kit schematics

Available here

Ordering Information

FPGA EZ-Kit from Analog Devices

FPGA Development

Xilinx provides a full FPGA development environment for free, called WEBpack ISE 8.2i available here. It is available for Windows and Redhat Enterprise 3 and 4. Since uClinux software development is most likely done on a linux host, that is also ideally where the FPGA development will be done as well. Since paying for a linux distro(redhat enterprise) is for suckers, this project will attempt to use the WEBpack software on a Debian distribution.

A quickstart tutorial on FPGA development using Xilinx tools can be found here. It is very well written, easy to follow, and short. The output of this tutorial will be the first image that will be tested on the FPGA daughter card.

Modifications to the tutorial for the FPGA-EZ kit daughter card
Page Difference
PG 9 When specifing the device for the new project, select Device: XC3S1000 and Package: FG456
PG 25 The pinouts for the CLOCK, COUNT_OUT[3:0], and DIRECTION are incorrect for the FPGA EZ-Kit. See the table below for a correct pinout assignment
ISE Tutuorial pinout assignments
Signal name on FPGA schematic name on Blackfin BF537 schematic Pin on FPGA
COUT0 B2_L23N_F19_j2_47 PG8 U21
COUT1 B2_L21N_E21_j2_49 PG10 V22
COUT2 B2_L20N_E19_j2_51 PG12 V19
COUT3 B2_L19N_E18_j2_53 PG14 W21
DIRECTION B2_L17N_D21_j2_55 PF14 V19

Debian Quirks

PACE, the pinout assignment tool, will not run with a standard Debian Etch distro. If PACE $XILINX_HOME/bin/lin/pace is launched by itself, an error “could not find” will occur. You need to download the libmotif3 library using apt or synaptic. Unfortunately, this is a non-free library, so you may have to change your /etc/apt/sources.list by adding the following line:

deb unstable non-free

Ubuntu users - More Ubuntu setup problems can be solved by following instructions at Xilinx Ubuntu Setup. You may also need to add multiverse to your sources.list. See the ubuntu repositories for more information

You may also get an error, “Could not open display” when trying to launch PACE by itself. Remedy with the following on the command line:

export DISPLAY=:0

The xilinx tool may start giving bizarre errors after every few steps of the tutorial. Restarting the development environment, $XILINX_HOME/bin/lin/ise, often solved this. Hopefully this problem goes away.

Standalone Programming

The easiest way to get started with FPGA board is to program it standalone using the JTAG interface. It can be programmed with a parallel port jtagblue cable and XC3sprog software.

To use XC3Sprog, add the following lines to devlist.txt in the XC3S source distribution. This will let it properly detect the JTAG chain that is present on the FPGA EZ-Kit board.

11428093        6       XC3S1000
05045093        8       XCF02S

A hello-world project can be found under this Discussion Topic. It contains the verilog source and a .bit file that you can download to the FPGA board and to the FPGA PROM. Pressing down on the each of the push-buttons lights up an LED on the board.

TODO list

Important Links

Spartan-3 XC3S1000 datasheet Xilinx Software Manuals

Project maintainer: michrower [Jason Holden]