Stamp Board USB ISP176x Extender / Add-on Card Description The ISP1760 is a Hi-Speed Universal Serial Bus (USB (Universal Serial Bus)) Host Controller with a generic processor interface. It integrates one Enhanced Host Controller Interface (EHCI), one Transaction Translator (TT) and three transceivers. NXP. You can get the USB (Universal Serial Bus) card's schematic and PCB layout here. Driver The Linux driver is based on ISP1761_Linux269_HCD_Ver2.0.0.0 published by NXP on Linux Host Controller driver for the NXP ISP1760/ ISP1761 USB (Universal Serial Bus) High Speed Host Controller. This driver provides BULK, INTERRUPT, and ISOCHRONOUS transfer support. The ISP1761 Host stack is implemented on SOF Interrupt based mechanism. This means there will be 1000 Ints/sec. even with no data transferred. The driver supports up to 3 HOST ports. USB (Universal Serial Bus)-OTG and Device Mode is currently NOT supported. There is also no support forDMA (Direct Memory Access)based transfers. For more details visit the project page on SourceForge Release Notes: This driver was removed from our trunk source code repositories in favor of the mainlined isp1760-hcd driver written by Sebastian The mainlined driver doesn't support isochronous transfers anymore! Jumpers setting on USB Add-on Card JP4: 1-2 & 3-4 = OTG / HOST, EXTERNAL POWER SUPPLY, USB (Universal Serial Bus)_AB1 MOUNTED 2-3 = OTG, INTERNAL POWER SUPPLY, USB (Universal Serial Bus)_AB1 MOUNTED 3-4 = HOST, EXTERNAL POWER SUPPLY, USB (Universal Serial Bus)_A1 MOUNTED JP5: 1-2 = B / DC 2-3 = A / HC / ISP1760 JP3: 5-6 SET for 16-bit BUS MODE 5-6 OPEN for 32-bit BUS MODE Set JP1 (INT1 HC) to choose a PF pin as interrupt for ISP176x. Jumpers on JP1 are divided into two categories, one is for BF533 stamp board, and another is for BF537 stamp board. The setting should be concurrent with the kernel configuration. Settings for BF533-STAMP Jumpers to setting , PF pin 1-2 , PF4 3-4 , PF8 5-6 , PF9 7-8 , PF14 9-10 , PF15 In order to make BF533 to work with USB (Universal Serial Bus) extender, the CPLD (Complex Programmable Logic Device) on BF533-Stamp Board need to be reprogrammed. For how to reprogram CPLD (Complex Programmable Logic Device), please refer to cpld_programming. The CPLD (Complex Programmable Logic Device) file is . In addition, to use the USB (Universal Serial Bus)-LAN with the BF533 you have to populate the U-connector. Settings for BF537-STAMP On the USB (Universal Serial Bus) Board: Jumpers to setting , PF pin 11-12 , PF3 13-14 , PF4 15-16 , PF5 17-18 , PF6 19-20 , PF7 Set sw6.4 to off, to disconnect Asynchronous Memory banks 3 from the NOR (Not OR (parallel flash memory type)) Flash on the STAMP board. If choose PF2 to PF5 as the interrupt pin for ISP1362 and SL811HS, the correspondent switch on sw5 need to be set to off according to the following table. PF pin , switch PF2 , sw5.1 PF3 , sw5.2 PF4 , sw5.3 PF5 , sw5.4