AD1836A Audio Codec Card Description This daughter card implements both digital and analog audio input and output. It is based on the AD1836A chipset from Analog Devices. Two stereo inputs and three stereo outputs are provided with support for both mic and line level input. An S/P-DIF interface with transmit and receive capabilities is also provided. This daughter card connects to the STAMP board via the Serial Port Controller Interface (SPORT0 or SPORT1) connector. The schematics can be found on the web site. The AD1836 audio card provides three channels of stereo audio output (6 total), two channels of stereo input, S/PDIF in and S/PDIF out. The SPORT (synchronous high speed serial port) interface of the processor is linked with the stereo audio data input and output pins of the AD1836 codec. The processor is capable of transferring data to the audio codec in time-division multiplexed (TDM) mode and can operate at a maximum of 48 kHz sample rate but allows for simultaneous use of all input and output channels. The AD1836 audio codec's internal configuration registers are configured using the processor's SPI (Serial Peripheral Interface) ports. The processor's programmable flag pin is used as the select for this device. For information on how to configure the multichannel codec, go to the AD1836 Driver in the uClinux kernel. AD1836A The AD1836A is a high performance, single-chip codec that provides three stereo DACs and two stereo ADCs using ADI’s patented multibit Σ-Δ architecture. An SPI (Serial Peripheral Interface) port is included, allowing a microcontroller to adjust volume and many other parameters. The AD1836A operates from a 5 V supply, with provision for a separate output supply to interface with low voltage external circuitry like the Blackfin processor. There are four ADC channels in the AD1836A configured as two independent stereo pairs. One stereo pair is the primary ADC and has fully differential inputs. The second pair can be programmed to operate in one of three possible input modes (programmed via SPI (Serial Peripheral Interface) ADC Control Register 3). The ADC section may also operate at a sample rate of 96 kHz with only the two primary channels active. The ADCs include an on-board digital decimation filter with 120 dB stop-band attenuation and linear phase response, operating at an over-sampling ratio of 128 (for 4-channel 48 kHz operation) or 64 (for 2-channel 96 kHz operation). The AD1836A has six DAC channels arranged as three independent stereo pairs, with six fully differential analog outputs for improved noise and distortion performance. Each channel has its own independently programmable attenuator, adjustable in 1024 linear steps. Digital inputs are supplied through three serial data input pins (one for each stereo pair) and a common frame (DLRCLK) and bit (DBCLK) clock. Alternatively, one of the “packed data” modes may be used to access all six channels on a single TDM data pin. Jumper settings Jumper , Reference , Default Setting Clock Source , J1 , 1-2 : Disable S/P-DIF ADC2 Left input Mode , J9 , 3-5 & 4-6 : PGA Mode ADC2 Right input Mode , J10 , 3-5 & 4-6 : PGA Mode MIC PreAmp Gain , J11 , 1-3 & 2-4 : 40dB Gain Mic/Lin Selection , J12 , 1-3 & 2-4 : Mic AD1836A SPI (Serial Peripheral Interface) Chip Select , J5 , 9-10 : PF4 S/P-DIF SPI (Serial Peripheral Interface) Chip Select , J4 , 7-8 : PF3 S/P-DIF Interrupt , J7 , none S/P-DIF Error Indicator , J8 , none Clock Source (J1) This jumper determines where the clock source comes from. It can either come from the S/P-DIF receiver (short pins 2-3), or from the crystal (short pins 1-2). This is here to provide the highest clock quality to ensure that the audio performances is as high as possible. Jitter on the clock from the S/P-DIF receiver, will translate to a poor performing audio in and out, however, this is required when wanting to use SPDIF input. Jumpers to short , Clock Source 1-2 , Crystal : Disable S/P-DIF 2-3 , S/P-DIF Receiver ADC2 input Mode (J9/J10) The secondary input pair on the AD1836A can operate in one of three modes: Direct differential inputs. Programmable Gain Amplifier (PGA) mode with differential inputs. In this mode, the PGA amplifier can be programmed using the SPI (Serial Peripheral Interface) port to give an input gain of 0 dB to 12 dB in steps of 3 dB. External capacitors are used after the PGA to supply filtering for the switched capacitor inputs. Single-ended MUX/PGA mode. In this mode, two single-ended stereo inputs are provided that can be selected using the SPI (Serial Peripheral Interface) port. Input gain can be programmed from 0 dB to 12 dB in steps of 3 dB. Jumpers to short , Setting 3-5 & 4-6 , PGA MODE 1-3 & 2-4 , HIGH PERFORMANCE MIC PreAmp Gain (J11) To select to MIC Gain, use J11. Jumpers to short , Gain None , 0dB 4-6 & 3-5 , 20dB 2-4 & 1-3 , 40dB Mic/Line Selection To turn on or off the mic bias on the jack, Jumpers to short , Gain 4-6 & 3-5 , Line In 2-4 & 1-3 , Mic In Software Settings To enable this in the kernel, please see the ad1836 page. Using I2S Mode In order to use I2S mode with versions 0.82 and 0.9 of the card the TFS and RFS signals on the SPORT (synchronous high speed serial port) interface must be connected together. This can be done by connecting pins 7 and 11 on J3 (the SPORT (synchronous high speed serial port) connector) with modwire. See the schematics for details. At present there is no jumper to make this connection.